I'm Mohith Muppalla an ASIC Physical Design Engineer with hands-on experience in floor planning, placement, CTS, and STA. I'm currently learning about the semiconductor industry and passionate about helping others break into VLSI. I guide students and freshers in: Building strong resumes for VLSI roles Understanding PD flow (RTL to GDSII) Interview preparation (technical + HR) Clarifying concepts in STA, CTS, congestion, timing closure, etc. Whether you're a beginner or preparing for interviews, feel free to connect for a focused 1:1 call.