30 mins call

Connect 1:1 with me over a video call to discuss anything you want

ABOUT:

Hi, I'm Mohith Muppalla – a passionate and aspiring VLSI Physical Design Engineer. I have recently completed hands-on training and an internship at Sumedha Institute for VLSI, where I work on the complete RTL to GDSII flow using industry-standard tools like Cadence Innovus, Genus, and Tempus.

Whether you're a student, fresher, or someone looking to transition into VLSI, I can guide you through:

• Physical Design flow (Floorplanning, Placement, CTS, Routing, STA)
• Cadence tool usage & commands
• VLSI interview preparation (project explanation, real-time questions)
• Resume building and career advice for VLSI

Let’s connect and make your VLSI journey easier and more confident!

🔹 My Experience

• Intern – VLSI Physical Design, Sumedha Institute for VLSI (8 Months)
• Worked on end-to-end Physical Design flow from RTL to GDS
• Gained hands-on experience with Cadence tools: Innovus, Genus, Tempus
• Performed Floorplanning, Placement, Clock Tree Synthesis, Routing, and STA
• Learned timing analysis, congestion fixing, and signoff checks