Experienced, hands-on senior technology development leader with deep experience in System Architecture & Performance domain. Strong track record of conceiving and delivering Datacenter Computing solutions encompassing Interconnect, Memory (DDRx, HBMx, LPDDRx), Accelerators & System components contributing multi-billion $ revenue. Lead Performance Architect for multiple generations of FPGA-based Infrastructure Processing Unit (IPU) & Intel Atom-based Home Gateway SoCs. I can identify technology trends, set product directions, & drive innovation & execution. My core competencies include the ability to define & build complex hardware & software systems & work with executives, customers, & eco-systems partners. I am skilled at identifying opportunities, creating the vision, & effectively directing all aspects of the system to deliver best-in-class products. Track record of nurturing critical talent & growing end-to-end technical capabilities grounds up. Leading performance teams across the US, Cananda, Singapore, Penang, & India. 💡 HIGHLIGHTS & EXPERTISE • 10+ years of experience in System Architecture, Power-Perf-Area analysis, & optimization covering numerous IP, SoC, & Platform solutions. I have rich vertical experience & expertise from feature definition to tape out. Rich experience in leading SoC performance sign-off from the SoC architecture phase to post-silicon. • Well recognized industry expert and influencer in performance design space exploration, benchmarking, analysis, and associated methodologies, tools, & flows. Experience in Leading Platform/SoC performance modeling, projection & correlation pre/post-silicon methodologies for SmartNICs in data center and home gateways in the client market. • Experienced author of architecture specifications for interconnect & DRAM Subsystem of complex SoC designs, defining SoC micro-architecture, IP configuration, IP selection. Hands-on working experience with Arteris Interconnect, ARM Interconnect, Synopsys uMCTL2 memory controller, and memory PHY IP. • Software performance modeling experience to model complex Interactions and data flows across complex compute architectures like CPU, AI accelerator engines, etc. Workload characterization experience for Linux, Android OS, and AI workloads. ✔ Hands-on Expertise: - AXI, JEDEC DDR3, DDR4, LPDDR4/4X, DDR5, LPDDR5, PCIe 4.0/5.0 Protocol - Algorithms & Data Structures, Modelling - C, C++, SystemC, Verilog, VHDL, TLM 2.0, TCL, Bash - Synopsys Platform Architect, Core Consultant, Virtualizer, Simics, Arteris FlexNoC - Linux OS, Android OS, x86 ISA