28:I[86869,[],"IconMark"] 24:["$","img",null,{"height":"1","width":"1","style":{"display":"none"},"alt":"","src":"https://www.facebook.com/tr?id=3659591550929113&ev=PageView&noscript=1"}] 25:T406,{"@context":"https://schema.org","@graph":[{"@type":"ItemPage","@id":"https://topmate.io/vikal_chandra/1428751#page","url":"https://topmate.io/vikal_chandra/1428751","mainEntity":{"@id":"https://topmate.io/vikal_chandra/1428751#service"}},{"@type":"Service","@id":"https://topmate.io/vikal_chandra/1428751#service","name":"Verilog/SV Discussion","url":"https://topmate.io/vikal_chandra/1428751","provider":{"@id":"https://topmate.io/vikal_chandra#person"},"serviceType":"1:1 Call","description":"Video Meeting","offers":{"@type":"Offer","price":50,"priceCurrency":"INR","availability":"https://schema.org/InStock","url":"https://topmate.io/vikal_chandra/1428751"},"additionalProperty":[{"@type":"PropertyValue","name":"Duration","value":"30 minutes"}]},{"@type":"Person","@id":"https://topmate.io/vikal_chandra#person","name":"Vikal Chandra","url":"https://topmate.io/vikal_chandra","jobTitle":"Expert in RTL Design, Verilog, System Verilog, Lint, CDC, STA, FPGA etc","image":"https://static.topmate.io/profile_pic_default.png"}]}27:T52c,New Service Description:

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Verilog/SV Discussion with Vikal Chandra

Vikal Chandra

Verilog/SV Discussion