I’m Vidya S — a TD‑ESD Designer at Micron Technology with strong PERC‑ESD and backend tool experience, specializing in reliability and ESD rule checks across 16nm, 22nm, and 5nm technologies. With an M.Tech in Microelectronics & VLSI (MNNIT) and a B.Tech in ECE (GNITS), my background also includes hands‑on analog design work in PLL/DAC analysis, design automation, and scripting in Shell, Perl, and TCL. I help learners and professionals break into VLSI, understand PERC/ESD flows, plan impactful M.Tech projects, strengthen automation skills, and refine resumes or portfolios — simplifying complex concepts with practical, real‑world insights.