Testimonials
Services
Video meeting . 30 mins
4.9
Video meeting . 30 mins
4.9
Priority DM . 2 days reply
5
Priority DM . 2 days reply
5
Video meeting . 60 mins
5
Mock interview
Interview For EC graduates (fresher) and DV exp engineers
Video meeting . 30 mins
5
Priority DM . 2 days reply
5
About me
I am a semiconductor technocrat and experienced Design Verification Engineer having proficient knowledge of C, System Verilog and UVM. Professional European (NL) work culture experience of working onsite and currently working in Axelera AI (ex-Qualcomm). I like to explore and share about VLSI related stuff to my colleagues. I have portrayed small small issues faced by junior engineer at start of career. I want to share this issues with the community such that they could be useful to someone else.
- Timir Soni is praised for his insightful sessions, strong expertise in Design Verification, and dedication to guiding juniors with detailed explanations.AI-generated based on testimonials
- VLSI Mentorhttps://verificationmentor.mystrikingly.com/
