Hi, I’m Shubham Satpute, an M.Tech graduate in Microelectronics & VLSI from NIT Durgapur and a GATE-qualified (ECE) engineer with strong industry experience across multiple VLSI domains. At IBM I currently work as an industry professional in the DFX space, with a unique blend of DFT, Design Verification (DV), and post-silicon functional validation. My work spans wafer-level and module-level testing, with deep hands-on experience in IOBIST and high-speed I/O validation, including PCIe PHY and LPDDR PHY end-to-end validation and pattern generation. I have worked extensively with Synopsys TestMAX, including MBIST using SMS solutions and core/IP testing using SHS methodology. I also have strong exposure to PCIe and LPDDR PHY IP verification at subsystem and chip levels also Scan, ATPG, DFT & DV industry flows. Beyond hardware validation, I develop Python-based automation and APIs for hardware testing workflows such as POR, boot/initialization sequences, functional unit tests, and lab automation. I am comfortable working in Linux environments, with solid experience in DevOps, GitHub workflows, CI/CD pipelines, and build systems. Technical Skills: Python, Perl, TCL,Bash, Makefiles, Verilog, VHDL, SystemVerilog, UVM, Synopsys DFT/Test tools, DV flows, Post-silicon validation I enjoy mentoring, and simplifying complex VLSI concepts, especially around DFT, MBIST, Scan ATPG,JTAG, DV, HSIO PHY verification&validation, and real industry workflows. Script and Automations. Help students to crack Interviews and offers 1:1 sessions