Part of Intel's Core formal Verification group applying formal methods to verify various IPs from data center IPs in Xeon to Standard Industry interfaces like PCIe, CXL. Short summary of my Skills (technical) Assertion based verification Formal modelling Formal abstractions and convergence Verilog | System Verilog Dynamic verification using UVM (Non technical) Leading small team of formal verification engineers Helping new formal engineers on formal execution of their designs