I have an expertise in Clocking and its Integration. I have helped streamline design execution, supported numerous projects (on 10nm, 7nm, 2nm, 1.8nm etc.) across different products (Client, Servers & Graphics). I am conversant with (Regular, Structural) Multi Source CTS, CCD technique for the local clocking and all aspects of custom global clock, from construction to validation. I am eager to learn and broaden my knowledge in back-end physical design domain. Tools: Synopsys IC Compiler II, Fusion Compiler, HSPICE