I am an M.Tech student in VLSI Design at the National Institute of Technology Silchar with a strong academic background in Electronics and FPGA Design. I qualified GATE ECE 2025 with an All India Rank (AIR) 3964, secured an IIT JAM AIR 700, and qualified JEE Main with an AIR of approximately 90,000. My expertise includes FPGA/ASIC Design, RTL Design, Digital IC Design, Verilog/SystemVerilog, DDR3, AXI, PCIe, MIPI, and Xilinx FPGA platforms. Currently, I am working as an FPGA Design Intern at BotLab Dynamics, where I develop high-speed image and video processing systems using Xilinx devices. I am passionate about semiconductor design, verification, and advanced digital system development, with research experience in IEEE-754 Floating-Point ALUs and CORDIC-based architectures.