9+ years of experience across SoC Verification and Silicon Validation. Currently working at Arm in the CPU and system performance analysis team. Graduated from IIT-Guwahati with a B.Tech in ECE. Domains of Expertise : SoC Verification using Emulation, Simulation Acceleration and FPGA prototypes Multi-Die Validation - Testplan creation to execution Post-Silicon Validation and Debug of Customer Platforms (both bare-metal and OS based) Validation of System-level Scenarios and Low-power Modes. Languages known : C/C++, SLN(Perspec), Python, Perl, System Verilog/UVM Expertise in IP : GPU, Image Processor, Power Manager IPs Interface knowledge : AHB, AXI, DMI, Intel's Scalable Fabric, Die-to-Die Interconnects. Tools : Perspec, Verdi/VCS, Lauterbach (silicon debug) Hobbies: Chess Player (FIDE rated) Debating (Traditional and Parliamentary) Karting and watching F1 Racing