Services

Video meeting . 20 mins

1:1 Mentorship free for DV engineers

1:1 Mentorship for Design Verification Engineer
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Priority DM . 2 days reply

Priority DM

DM me for any DV related quick question
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Video meeting . 45 mins

Free Mock Interview DV with feedback

Mock interview covering all DV topics typically asked
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About me

Hi, I'm DV Engineer with over 6 years of professional experience (Arm, AMD) and Masters in Computer Engineering. My expertise is Arm based CPU Subsystem IP with AMBA CHI/AXI/ACE/AHB/APB bus coherent interconnect verification. I'm well versed in Programming with System Verilog, UVM, C/C++ STL, shell, and Python targeted for Design Verification Automation I've developed strong Understanding of Software Programming fundamentals and Object Oriented Programming principles for writing reusable and scalable code. I've deeper knowledge of Advanced Computer Architecture principles for High-Performance Out of Order CPU Core Engine for x86 & ARM 64 bits architecture from my Masters in Computer Architecture and work experience at AMD and Arm as a CPU DV Engineer.