I’m Praveen, a digital design engineer with 6+ years of RTL experience across Qualcomm, AMD, and IIT Madras. I specialize in building and reviewing robust hardware logic — from FSMs and buffering modules to timing-critical designs. Alongside engineering, I’ve mentored over 50 learners in mathematics, digital logic, and interview prep, helping them gain clarity and confidence. Whether you're a student or a working professional, I aim to make technical learning approachable, rigorous, and rewarding.