Areas of Interest: Physical Design, Computer Architecture, RTL Design, Functional Hardware verification. Hardware Description Language: Verilog HDL, System Verilog, Assembly Language(MIPS) Scripting Language: TCL Programming Language: C, C++. Tools: Synopysy ICC2, Cadence SOC Encounter, Synopsys Primetime, DesignVision, MATLAB, Xilinx ISE, Cadence Virtuoso, Cadence Simvision, Cadence Spectre