Services
Video meeting . 15 mins
Priority DM . 2 days reply
Video meeting . 30 mins
Priority DM . 2 days reply
Video meeting . 15 mins
Video meeting . 60 mins
About me
I began my career in the VLSI industry as a Design Verification Trainer and later transitioned to a role where I gained extensive exposure. I have worked on VIP and TestBench Development from scratch, focusing on various protocols such as APB, AHB, AXI, Wishbone, and different projects including Interrupt Controller Verification, DMA IP Verification, Ethernet MAC Verification, and Security Blocks like Crypto and Random Number Generators on SOC.
I possess strong communication, presentation, and problem-solving skills, along with a knack for fast in-depth learning and leadership qualities. My expertise includes Digital Electronics, Verilog, SystemVerilog, SVA, UVM, C, and C++. Additionally, I am currently expanding my knowledge in Python scripting, Cryptography and Computer Architecture.
Throughout my academic and professional journey, I have achieved numerous accolades in the fields of VLSI,Embedded Systems, Robotics, and Networking.
- No recommendations available.AI-generated from recommendations on