I have 6+ years of experience in Pre and Post silicon SoC functional validation. I have working experience in Emulation, FPGA, In-Circuit Emulation (ICE), Silicon Power-On. During my time at Intel I have worked with Intel Foundry Services, Data Center Group, Client Computing Group & IOT group . I am well versed with modern x86, ARM architectures. I have worked on various server SoC domains & features including PCIe, UCIe, Telemetry, RAS, Boot flow, HW-FW interactions, Resets, I2C, SPI. I have my domain expertise in HSIO validation. In my roles so far I have written validation strategies, test plans, test contents and have root caused many complex silicon hardware & software issues. I have developed test contents in C, Python and Shell based scripts and have hands-on experience with JTAG based debug tools, high speed logic analyzers, PCIe exerciser, PCIe analyzer and Oscilloscopes, server platforms.