Testimonials

  • Kritika is one of those rare people who genuinely give back to the engineering community out of pure kindness. She takes time out of his own busy schedule to guide students and professionals in VLSI — not for profit or recognition, but because he truly wants to see others grow. What stands out most is how affordable and accessible he makes his sessions, even though the value he provides is immense. It’s clear that she does this because he cares — about engineers, about learning, and about making the semiconductor world a better, more welcoming place. She has a gift for explaining complex VLSI concepts clearly and patiently, and his encouragement gives confidence to those just starting their chip design journey. People like Kritika remind us that kindness and knowledge-sharing can change lives.
    Anonymous
  • Session to helps me valuable inputs in industry cannot describe in words.
    Anonymous
  • Insight about more demand for verification engineer. Emphasis on GATE.
    Saksham Deolia
  • "I reached my goal very quickly – a lot quicker than I had expected. I owe a tremendous amount of credit to Kritika for challenging me, providing support, her positivity and accessibility."
    Mayank Dang

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Video meeting . 25 mins
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Ratings and feedback

5/5
9 ratings
9
Testimonials

About me

Hi, I’m Kritika, currently Senior SoC Design Engineer I am a Young Professional & STEM mentor and motivational speaker from the heart. Ever since my childhood (literally, I was 8 years old), I began playing with Electronics. Back then, I would open up and try to fix our broken electronics household items. However, I fell in love with Electronics Design Engineering owing to my passion for Physics and Mathematics. I started my professional career as a Design Engineer and worked on the Frontend SoC Design - RTL Design, Lint, Clock Domain Crossing (CDC), Timing Constraints, Synthesis, UPF, and ECOs. I have contributed significant productivity improvement through process automation using TCL & Perl in IP Integration into the SoC timeline. Presently, I am working as Senior SoC Design Engineer, working on Frontend Low Power Challenges across Client, Server, and IoT SoCs. I have successfully delivered in Micro-architecting, Developing, and Leading Low Power Design in Frontend for IP, Subsystem, and SoC in domains of UPF, Power Intent design, and Power Management Logic. DTTC, SNUG, Techbuzz, and a few other reputed Conferences have published my contributions towards Innovations in Low Power Design. During the pandemic, I realized that Job Market Requirements and Young Employee’s Expectations have changed radically. In my endeavor to bridge this gap, I rediscovered my passion to mentor Young Professionals and STEM Students to succeed in Academics, Early Career Planning, and Career Progression.