Services
Video meeting . 15 mins
Priority DM . 2 days reply
Video meeting . 15 mins
Priority DM . 2 days reply
Video meeting . 15 mins
Video meeting . 60 mins
About me
I Have 10+ years of Experience in VLSI Physical Design.
I have worked on cutting edge technology nodes such as 3nm, 5nm, 7nm, 8nm, 10nm, 14nm, and 28 nm . I have also worked on 45nm, 90nm and 180 nm.
I have worked on each step of Netlist to GDSII flow.
Specialties in Synthesis ,Place and Route, Physical Verification, and LEC.
Familiar with Machine learning in Physical Design, IR/EM analysis, Static Timing Analysis, Clock tree synthesis (CTS), TCL, and Python.
PV (Block level + top level), LEC ( Block level + top level), LOW POWER LEC ( Block level + top level) and PV on 5nm.
- Kirtesh Sir is an exceptionally brilliant mentor, colleague, and friend who consistently demonstrates high skill, dedication, and humility. He fosters a collaborative and friendly work environment, always willing to help others and share knowledge. Besides his professional responsibilities, Kirtesh is actively involved in non-technical activities, manages organization magazine articles, creates artistic work, and has a good singing voice.AI-generated from recommendations on
