Driven ASIC Development Engineer with a solid foundation in Electronics and Communication Engineering from Indraprastha Institute of Information Technology Delhi. Presently, driving Western Digital's achievements by taking the lead in the development of advanced CSSD controller SoCs. Specialized in SoC Design, RTL integration, IP test methodology development, RTL quality checks, test controller design, patterns development and silicon bringup. Additionally, I possess strong coding and scripting skills. Adept at FPGA design and development, demonstrated through various project and publication. Proficient in synthesizable RTL design, DFT, and VLSI design flow, with expertise in tools like Xilinx Vivado, Spyglass. Published in Chips Journal for groundbreaking work on hardware realization of 3GPP physical layer for 5G cell search. Recipient of the All Round Performance Medal, recognized for excellence in both academic achievements and non-academic endeavors. Beyond my professional endeavors, I am dedicated to pursuing my passions, which include salsa dancing, painting, and cultivating meaningful connections. My commitment extends beyond personal interests, as I remain steadfast in pushing the boundaries #opentowork