Hi, I’m Karthick M, a Physical Design Engineer with hands-on experience in RTL-to-GDSII flow, specializing in Physical Design implementation using Synopsys ICC2 and Cadence innovus. I have worked on industry-level projects with multiple tech nodes. Through those projects, I gained practical experience in: • Floorplanning & Power Planning • Placement & Optimization • Clock Tree Synthesis (CTS) • Routing & DRC awareness • Static Timing Analysis (STA) • TCL scripting What I offer: I help students and early-career engineers understand Physical Design from a practical, industry perspective. My focus is to make you job-ready through: • Mock interviews with real-time scenarios • Hands-on understanding of ICC2 flow, innovus flow. • Debugging concepts like setup/hold, congestion, and violations. • Resume and project guidance for VLSI roles. If you're preparing for Physical Design roles or struggling with concepts, tools, or interviews — I can guide you step-by-step.