Mock Interviews with Jithin Kalangi
Mock Interviews
~5 Years in VLSI Front-End Verification at AMD & Synopsys
1 rating and 5 bookings across all services
About this session
45 Minutes — Technical Mock: Live coding (Verilog/SV), state machine, scenario-based UVM architecture problems, Digital fundamentals and SV constraints and Assertions.
15 Minutes — Detailed Feedback: Line-by-line review of your technical performance, identification of core gaps, communication assessment, and a targeted 7-day preparation roadmap.