An ASIC Design Engineer with broad skill-sets and over 6 years of experience in Digital Logic Design | IP | SoC -- Proven experience in SoC/IP Development -- Worked on Architecture/Micro Architecture, Specification, RTL design, Timing, SoC Design, IP Design and various Subsystem level. -- Handled Digital Design from the scratch level [ Architecture to RTL to Sign-off, Performance/Power/Area (PPA) trade-off] -- Involved in multiple tapeout from TSMC 130nm to 7nm Technology nodes -- Actively involved/Designed complex IPs/SoCs -- Have helped and mentored integrate new team mates and get up to speed with workflow Why I am here? I realized that Job Market Requirements and Young Employee's Expectations have changed radically. In my endeavor to bridge this gap, I rediscovered my passion to mentor Young Professionals and Students to succeed in Academics, Early Career Planning, and Career Progression. I am here to help guide and support you. Lets connect on a whole new level, learn and grow together.