Iam Deepak, Iam Physical design engineer iam trained in Sumedha IT in VLSI Physical design, I have core skills in PD like Digital electronics, CMOS fundamentals, Synthesis, Floorplan, Powerplan, Placement, Routing, IR drop, Static timing analysis, Clock tree synthesis, Sign-off checks. and I have industry standard experience in Synopsys Design compiler, ICC compiler II. I guide students and freshers in: Building strong resumes for VLSI roles Understanding PD flow (RTL to GDSII) Interview preparation (technical + HR) Clarifying concepts in STA, CTS, congestion, timing closure, etc. Whether you're a beginner or preparing for interviews, feel free to connect for a focused 1:1 call.