Experienced Verification Engineer with a demonstrated history of working in the VLSI industry in companies like Broadcom, Google, Qualcomm and Mentor Graphics (Now Siemens EDA). I am Skilled in Universal Verification Methodology (UVM), SystemVerilog and Verilog and have helped several individuals in understanding the core concepts of the same. You can reachout to me if you need help with your upcoming interviews, resume review, mock interviews etc. I have been in the industry for 8 years now and have interviewed with more than 15 semiconductors companies in India, UK and USA and have cracked technical interviews for all of them. I am here to help you with anything that you need with your upcoming interviews , SV or UVM queries, or in general for a chat on tech. Please book a session if you think i can be of any help to you. Cheers!