Video meeting . 10 mins
4.9

RTL Design Cohort Shortlisting

FREE
Video meeting . 30 mins

Resume Review

Resume review for VLSI & hardware design roles
$26
Video meeting . 30 mins
5

Master’s Degree Mentorship

Gain expert guidance on applying for a Master’s in EE
$33
Video meeting . 45 mins
5

Custom Circuit Design Mock Interview

Circuit design mock interview with detailed feedback
$33
Package . 5 products

Hardware Interview Accelerator (Circuit Design)

Resume Review
Video Meeting
1
Career in VLSI/Hardware design
Video Meeting
1
Custom Circuit Design Mock Interview
Video Meeting
3
$97$148
Best Deal
Priority DM . 2 days reply

RTL Design Cohort – Shortlisting

Shortlisting for RTL course
FREE
Video meeting . 30 mins
5

Career in VLSI/Hardware design

Unlock your potential in VLSI and hardware design
$26
Popular
RTL Mock Interview . 45 mins
5

RTL Design Mock Interview

Industry-style RTL mock interview with detailed feedback
$33
Package . 5 products

Hardware Interview Accelerator (RTL)

Complete interview prep for RTL & hardware design roles
Resume Review
Video Meeting
1
Career in VLSI/Hardware design
Video Meeting
1
RTL Design Mock Interview
RTL Mock Interview
3
$97$148
Best Deal

Ratings and feedback

4.9/5
71 ratings
57
Testimonials
5/5
It was a really engaging and insightful conversation.
5/5
Nice
5/5
Very good experience
5/5
Very helpful.

About me

I am an experienced professional in VLSI design and semiconductor engineering, holding a Master’s degree in Electrical Engineering from the University of Southern California. Currently, I work at NVIDIA, where I contribute to cutting-edge ASIC and RTL design projects. My expertise includes digital design, high-performance computing, and hardware description languages like Verilog and SystemVerilog. I have a strong track record in optimizing power, performance, and area (PPA) for complex chips. In addition, I have developed custom circuits for intricate designs and worked extensively on physical design, including floor planning, routing, and clock distribution. I have experience collaborating with cross-functional teams to deliver innovative silicon solutions. I am skilled in microarchitecture (uArch), power analysis, debugging, synthesis, and timing analysis. Passionate about advancing hardware acceleration and AI-driven chip design, I am committed to pushing the limits of semiconductor technology.