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    Anonymous
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    Anonymous
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  • Wow nice
    Satyajeet Kunwar

Services

Video meeting . 30 mins
4.5
FREE
Video meeting . 30 mins
5
100
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5
50100
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Video meeting . 60 mins
5

Mock interview

VLSI Frontend, DFT, PD role interviews
250400

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4.8/5
18 ratings
17
Testimonials

About me

As a Design Verification Engineer at Qualcomm, I work on verifying DSP IP Low Power Design Verification using UVM, SystemVerilog, and Perl, PLL frontend Verification. I have experience in creating verification environments, test cases, assertions, and coverage to verify various blocks and protocols in SOC. I also work closely with the design team to debug and report bugs in the design, and to ensure verification plan completion on all desired metrics. I have a strong interest and knowledge in digital design concepts, ASIC verification flow, and test bench architecture. I have also worked on several projects in the field of robotics and automation, using different controllers, sensors, and programming languages. I am passionate about learning new technologies and skills, and contributing to the innovation and quality of the products and services I work on. The following is some of my skills and Specialties : Technical Skills : 👉 Languages: System Verilog, Verilog, C, Perl 👉 Verification Methodologies: UVM 👉 Protocols : AHB, APB, AMBA, I2C, SPI 👉 EDA Tools: Cadence Simvision, SYNOPSYS VCS, DVE, Questa Sim Specialties: 👉 Good knowledge of fundamentals of Digital Design Concepts. 👉 Depth Understanding of the ASIC Verification Flow, Test Plan & Test bench architecture. 👉 TB Architecture and Test Plan Development 👉 Proficient in Verilog & SystemVerilog & Knowledge of UVM. 👉 Worked on Assertion development, Functional coverage & created functional tests. 👉 Worked on code coverage analysis and coverage closure. 👉 Worked on end-to-end data path verification. 👉 Worked on IP-level verification. 👉 Worked on Low Power verification of DSP-IP. 👉Worked on PLL frontend verification, RAL model 👉 Hands-on experience in the verification of Protocols such as SPI, I2C, APB, and AHB. 👉 Worked closely with RTL designers to specify, develop and debug constrained-random and directed test cases toward coverage-driven verification closure. 🔧 Why Connect with Me? Proven Success: Having successfully interviewed at top-tier semiconductor companies, I possess a strong understanding of the industry.🏆 1:1 Guidance: Book a session with me for personalized advice on VLSI career development, interview strategies, mock interviews, resume enhancement, LinkedIn profile optimization, and more. 🤝 Empowering Futures: Whether you're a fresher venturing into the VLSI world or an experienced professional aiming to ascend, let's collaborate to shape your success story. 🚀 Let's unlock the doors to your VLSI aspirations together. Connect with me for a transformative 1:1 session! 🌐