Open to discuss challenging opportunities with visible responsibilities in technical/non-technical ladder. Core Competency: • Participated in various SOC's, Test Vehicles & full chip Integration for various analog macros, ranging from Memories, IO's, AMS Designs & Digital blocks. • Good Knowledge of analog & mixed signal layout and IO Layout design concepts :: matching, shielding, power mesh, IR drop & current density requirement etc. • Having a good blend of experience in both Circuit & Layout Design. • Complete Knowledge of ASIC Flow & IC Fabrication process. Technology nodes worked on: 180nm, 130nm, 90nm, 65nm, 40nm, 28nm, 14nm & 10nm Technologies. Feel free to connect anytime at aagupta88@gmail.com.